PTP Time Error Budget Calculator
ITU-T G.8271.1 / G.8275.1 — Substation centralized synchronization
Total TE at IED
—
Margin
—
—
Budget summary
Network TE at ref. C
—
G.8271.1 limit: 1100 ns
Total TE at IED
—
vs application limit
Remaining margin
—
positive = compliant
Status
—
TE stack vs application limit
cTE-only stack (linear
accumulation)
cTE adds linearly (worst case). dTE / PDV residual
adds as RSS.
Substation clock & application
Substation clock slave noise
APTSC servo + local oscillator contribution
100 ns
T-TC residence time error
Total T-TC chain in substation LAN — G.8273.3
50 ns
Application TE limit
End-device requirement (IED)
Source clock (PRTC / T-GM)
PRTC class
Sets the T-GM input TE — G.8272
T-GM noise generation (cTE + dTE)
T-GM noise generation above PRTC
0 ns
WAN chain (T-BC / T-TC)
Chain mode
Servo-based Boundary Clocks — G.8273.2. Each hop absorbs
PDV and adds bounded cTE to the linear stack.
Number of T-BCs
2
T-BC class (all hops)
Network impairments
Link asymmetry — total chain
Fibre / WAN uncorrected path delay imbalance
150 ns
Dynamic TE — PDV residual
Typical residual after slave packet selection filter; G.8271.1 Appendix V worst-case
design value is 200 ns
50 ns